中國(guó)PCB聯(lián)盟網(wǎng)首發(fā)-Cadence16.6 HOTFIX VERSION: 015 (15號(hào)補(bǔ)丁)

深圳-綠皮 · 發(fā)表于 2013-8-25 13:46:28

Cadence16.6 HOTFIX VERSION: 015 (15號(hào)補(bǔ)丁)-中國(guó)PCB聯(lián)盟網(wǎng)首發(fā)

DATE: 08-22-2013 HOTFIX VERSION: 015
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CCRID PRODUCT       PRODUCTLEVEL2 TITLE
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1156102 pcb_LIBRARIAN  CORE          PDV severe performance degradation on Linux platform makes PDV counter productive after some time
1165756 CONCEPT_HDL CORE          DE HDL 16.6 adding ASCII character to properties
1169896 ADW          LRM             Library Revision Manager makes updates but the interface never returns to the user
1170635 SIP_layout    WIZARDS       BGA PIN NAME doesn't sync with PIN Number
1171061 allegro_EDITOR PLACEMENT       Place Replicate Apply cannot place module
1171415 CONCEPT_HDL CORE          Mismatch in the interface ports in design bw_hybrid for block a38410_scsp
1171598 APD          WIREBOND       Cannot load xml over 65 profiles defined in file.
1171713 ADW          LRM             Blank lines appear in the LRM - RM-Clicking causes LRM to crash
1172576 SIP_LAYOUT    IMPORT_DATA    AIF import fails with Error: symbol is missing refdes
1172938 ALLEGRO_EDITOR PLOTTING       Export IPF probrem
1173190 ALLEGRO_EDITOR ARTWORK       Not able to Add/ Replace film_setup.txt file in Artwork control file.
1173750 ALLEGRO_EDITOR REPORTS       SIP tool crash when clicking report "Net Loop Report"
1175582 ALLEGRO_EDITOR SKILL          axlDBCreateFilmRec error undifined function